In This post you will get answer of Q.
The output from a $NAND$ gate is divided into two in parallel and fed to another $NAND$ gate. The resulting gate is a :
Solution:
The output of the given logic gate is
$C=overline{A.B}=A.B$
It is the Boolean expression AND gate.
Hence, the resulting gate is a AND gate.
Solution:
The output of the given logic gate is
$C=overline{A.B}=A.B$
It is the Boolean expression AND gate.
Hence, the resulting gate is a AND gate.